The present invention relates broadly to the field of electrical interconnection devices, and more particularly to interconnection devices electrically connecting leads incorporated on an semiconductor assembly to printed patterns on a test board.
Test systems for integrates circuits employ sockets for electrically connecting the integrated circuits thereto, in which leads of the integrated circuits (or device-under-test; DUT) are connected to patterns on test boards (or printed circuit boards) through the sockets. The socket must have an appropriate facility with mechanical and material characteristics so as to be available for performing repeated test operations.
While the sockets are utilized in many applications, e.g., from semiconductor chips to RF chips for communication system, an electrical characteristic of the test socket is influenced from high bandwidth frequency that is situated beyond hundreds MHz (mega hertz) to about several GHz (giga hertz), but not under tens MHz. The sensitivity of the electrical characteristic of the test socket in the high frequency acts as an important parameter determining test reliability in testing mobile communication chips such as CDMA (code division multiple access), PCS (personal communication system), and GSM (global system for mobile), and high bandwidth digital chips such as Rambus DRAMs. It is known that such an effect with the high frequency is due to parasitic constituents of itself, for instance parasitic inductance.
There has been a test socket proposed by Johnstech Co., in which the contact length is designed to be short so as to reduce parasitic inductance, but it has high cost for test with mass production. While, almost all of the test sockets have a longer contact length than the Johnstech""s in order to promote a function for the repeated test operations.
The present invention is intended to solve the problems. And, it is an object of the invention to provide a test socket with parasitic components therewith that are more reduced than ever before.
In order to accomplish the object, a test socket includes a horizontal upper portion connected to the integrated circuit chip, a horizontal lower portion connected to the printed circuit board; and an intermediate portion connected between the horizontal upper portion and the horizontal lower portion.